The present invention relates to a reference voltage generating circuit for use in the generation of a reference voltage in a constant-voltage circuit in C-MOS technology.
As is well known to persons skilled in the art, the most commonly used reference voltage generating circuit according to the prior art is a widlar band-gap reference circuit, but no reference voltage generating circuit solely consisting of MOS transistors is known to be available for practical use. A paper on an NMOS reference voltage generating circuit utilizing the threshold voltage difference between an enhancement MOS transistor and a depletion MOS transistor was published (1978, ISSCC, No. WAM 3.5), but its performance characteristics are not adequate for practical application either.
MOS transistors, however, have many advantages, and it is called for to develop a reference voltage generating circuit that can be realized on a CMOS integrated circuit. Notably, such a circuit should be excellent in temperature performance, but, since MOS transistors are significantly uneven in manufactured state and, moreover, their temperature dependence is curvilinear unlike bipolar transistors whose temperature dependence is linear, how to control this characteristic possesses a major problem.
On the other hand, among reference voltage generating circuits consisting of MOS and bipolar transistors, what is illustrated in FIG. 8 is known, for instance. This reference voltage generating circuit is commonly known as a band-gap voltage reference circuit, and FIG. 8 illustrates an example realized by executing a CMOS process over an N type substrate with a view to large-scale integration. Its configuration centers on an OP amplifier 31 and so-called parasitic transistors (Q1 and Q2). Its outline will be described below.
In FIG. 8, the base-emitter voltage V.sub.BE1 of Q1 is represented by equation (1), and the base-emitter voltage V.sub.BE2 of Q2, by equation (2). In equations (1) and (2), I.sub.S1 and I.sub.S2 are the saturation currents of Q1 and Q2, respectively, V.sub.T being equal to kT/q, where k is Boltzmann's constant, q, the charge of an electron and T, absolute temperature. EQU V.sub.BE1 =V.sub.T 1n(I.sub.1 /I.sub.S1) (1) EQU V.sub.BE2 =V.sub.T 1n(I.sub.2 /I.sub.S2) (2)
From equations (1) and (2) are derived equation (3), which represents the difference voltage .DELTA.V.sub.BE of the base-emitter voltages of Q1 and Q2. EQU .DELTA.V.sub.BE =V.sub.BE1 -V.sub.BE2 =V.sub.T 1n{(I.sub.1 /I.sub.2)(I.sub.S2 / I.sub.S1)} (3)
Since Q1 and Q2 are equal here in emitter area, I.sub.S1 equals I.sub.S2. Therefore, the difference voltage .DELTA.V.sub.BE is represented by equation (4). EQU .DELTA.V.sub.BE =V.sub.T 1n (I.sub.1 /I.sub.2) (4)
Further, I.sub.2 =.DELTA.V.sub.BE /R.sub.3. Therefore, the output reference voltage V.sub.REF can be obtained by equation (5). ##EQU1##
The temperature dependence of this output reference voltage V.sub.REF can be represented by equation (6) because the ratio R.sub.1 /R.sub.3 is independent of temperature. ##EQU2##
The first term of the right side of this equation (6) is approximately -2 mV/deg. Because the ratio between I.sub.1 and I.sub.2 in equation (4) can be considered to be substantially constant and is logarithmically compressed, the temperature dependence of the difference voltage .DELTA.V.sub.BE is represented by equation (7). EQU d.DELTA.V.sub.BE /d T.apprxeq.+0.085 mV/deg.times.1n (I.sub.1 /I.sub.2)(7)
Therefore, if (R.sub.1 /R.sub.3)1n(I.sub.1 /I.sub.2) is set to be 23.5, dV.sub.REF /dT will be approximately 0. If V.sub.BE1 is approximately 0.6 V here, V.sub.REF can be calculated to be approximately 1.211 V.
The above-described prior art reference voltage generating circuit illustrated in FIG. 8, on account of its use of an OP amplifier as the control element, involves the problems of a large circuit scale and a large drain current.